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CVEST focuses on broadly two different areas. The first one is on designing low power, high speed integrated circuits and systems. The second area involves innovating new tools and techniques for addressing problems in High Performance Computing Architectures. The activities are designed to train manpower for carrying out research and development work and take up industrial problems.
In VLSI design area, research, to conceive and develop integrable low power circuits both from the point of hardware and software is conducted. The work carried out here generally starts from the concept and ends in the product design. The work is mostly based on simulations.
In the area of High Performance Computing the current research efforts mainly lie in designing and devolping algorithms, System Tools and Compilation/Runtime techniques for exploiting the computing power of Many-Core machines and GPGPUs. Efforts are also being made to design special purpose FPGA based accelerators.
Subareas
- Low Power VLSI Design
- System on Chip (SOC)
- Optimizing Compilers for High Performance Architectures
- Parallel Programming and Concurrent Data Structures
Teaching Programmes (associated with VLSI and Embeded Systems Technology)
- B.Tech in Computer Science and Engineering
- B.Tech in Electronics and Communications Engineering
- M.Tech in VLSI and Embedded Systems
- MS in Electronics and Communications Engineering
- Ph.D in Electronics and Communications Engineering
Major Funded Projects
- Architectural Techniques for Process Variation Aware Designs (2007-2010) (Department of Science & Technology, Govt. of India)
- Phoenix-based Compiler Course Development (2006) (Microsoft)
- Rotor-based Course Development (2004) (Microsoft)
- Open Source Tech Program Scholerships (2007) (Microsoft)
- Design of 8-Bit Current Steering 'DAC' with Integrated Power Supply (2009-2009) (ANURAG, DRDO, Ministry of Defence)
- Study and Design of Low Power and High Efficiency SRAM for Memories (2009-2011) (DST)
- Design Validation of Firmware Algorithms of the Jammer Processing Unit (2010-2011) (Defence Electronics Research Laboratory, DRDO, Govt. of India)
- IO Protection Strategies in Multi Voltage Signaling Environment in ICs (2010-2013) (Directorate of Extramural Research and Intellectual Property Rights (ER&IPR), DRDO, Govt. of India)
Achievements
Contests
- Students of the CVEST Lab have, time and again, performed exceptionally well at the Annual Nationwide Research Contest organized by Intel. In 2005-06, the students were part of the final 13 teams. The next year, students won the contest for their entry on a High Speed ALU Design. Again, in 2008-09, CVEST M.S. students won the contest which saw over 200 entries.
- A team of Masters and Ph.D. students of the Lab won the 2008 version of the Cadence India Design Contest, for their work titled "Design of a Low Power, Variable Resolution Flash-Type ADC".
- Also, students reached the finals of the Altera Nios Design contest in 2006.
- IIIT-H's team Mission Gaganyaan has been ranked FIRST at the Global Aerospace Competition CanSat 2010, which has seen participation from premier Universities from across the world, at Amarillo, Texas, USA, on June 13, 2010. IIIT-H team is the ONLY one from India and the FIRST from ASIA to win this global competition.
- A IIIT-H CSE students’ project Aarogyam, mentored by Dr. Shubhajit Roy Chowdhury, received the first prize at the VNR VJIET, Hyderabad organized national level techno symposium. Aarogyam is a software enabled tool for use by semi-literate patients for self diagnosis.
- Under Dr. Shubhajit Roy Chowdhury’s guidance, IIIT-H’s bachelor’s students of ECE won the fourth place at the Finals of the World Embedded Systems Contest 2010 (WESC 2010). The team was recognized for its work, the “Red Eye”, a laser technology based virtual gaming environment, in the finals at Seoul, South Korea.
Best Paper Awards
- IIIT-H's ECE Students Bag Best Poster Award at the National Conference on Sensors and Actuators 2011. The all India conference was jointly organized by the Government of India’s Department of Science and Technology (DST) and Government of India’s Council of Scientific and Industrial Research (CSIR), at Kolkata, on March 11-12, 2011. The poster, titled “A Low Cost Portable Temperature-Moisture Sensing Unit With Improved ANN Based Signal Conditioning For Smart Irrigation Applications”, was authored by B Tech (ECE) students Aman Tyagi, Arrabothu Apoorv Reddy, and Jasmeet Singh, and their guide Dr. Shubhajit Roy Chowdhury.
Others
- The CVEST Lab was involved in the Microsoft Digital Inclusion Research Funding Scheme, working in the area of Telemedicine. Students also showcase their work in the annual R&D showcase hosted by IIIT, Hyderabad, which is frequented by Senior Personal for the industry.
Faculty
- Shubhajit Roy Chowdhury
- R Govindarajulu
(Head)
- Satyam Mandavalli
- Suresh Purini
- Azeemuddin Syed
Past Faculty
- P Vijaya Sankara Rao
Past Lecturers/Research Lecturers
- R Ravindra J V
Students
- R Gopi Krishnan
- Vasu Pulijala
- Aman Gupta
- Anshul Singh
- Suresh Kumar Varanasi
- Sumit Raj
- Mamatha Samson
Past Students
- Apoorva Sharma
- Anshul Agarwal
- Pradeep Kumar Sana
- Sandeep Saini
- swathireddy@research.iiit.ac.in
- R Bharghava
- Prashanth Paramahans
- Abinesh Ramachandran
- Akshaykumar Salimath
- A Padma Sravani
- Sandhya Vinjam
- R Ravindra J V
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