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A Power Efficient Back-Terminated HDMI Signaling SystemAuthor: Gopikrishnan Radhakrishnan Date: 2019-01-05 Report no: IIIT/TH/2019/1 Advisor:Azeemuddin Syed AbstractThe High-Definition Multimedia Interface(HDMI) is used for transmitting digital television audiovisual signals from DVD players, set-top boxes and other audiovisual sources to television sets, projectors and other video displays.It can carry high quality multi-channel audio data and can carry all standard and high-definition consumer electronics video formats.HDMI is a digital replacement for existing analog video standards.At its heart, HDMI is a high-speed, serial, digital signaling system that is designed to transport extremely large amounts of digital data over a long cable length with very high accuracy and reliability.In order to achieve such high accuracy and reliability,HDMI uses Transition minimized Differential Signalling (TMDS) to move information from one place to another.In this scheme, the data is encoded so as to reduce the number of 0-1 transition which in turn reduces the inter-symbol interference.The encoded data is then transmitted serially over the cable.The physical layer for TMDS is current mode logic, DC Coupled and terminated to 3.3V.The use of Current Mode Logic(CML) ensures superior performance in noisy environments and in the presence of lossy transmission lines. Need for a low-power HDMI Source At 3.4 Gb/s data rate the power consumption of a conventional HDMI source is signicant and so there is a need for new HDMI source architectures for saving power while meeting the specifications defined by HDMI standards. Reduced power consumption is achieved in previous literature by using single-ended source structure. But, it is well known that such an arrangement is more susceptible to supply noise due to its poor power supply rejection and also susceptible to other noise sources such as crosstalk from neighboring lines. Proposed Solution Here, we propose an HDMI source with reduced power consumption while retaining the differential signalling so as to maintain better noise immunity. Proposed power-efcient back-terminated HDMI source transmits the data at 3.4 Gb/s per channel while meeting all other specications of HDMI standards. The proposed source provides high output impedance for current mode driving as well as a back-impedance of 100 Ω for matching the characteristic impedance of the line. With the help of the proposed circuit topology it is possible to achieve the output voltage swing dened by HDMI standard with a smaller tail current thus bringing down the power consumption of the HDMI source. This HDMI Source is mplemented in 3.3V, 0.18μm CMOS Technology which takes into account the device parasitic and second-order effects. The HDMI system also includes an 8-bit pseudo random binary sequence (PRBS) Generator driven by a phase locked loop (PLL) which provides the source with differential test data. The PLL provides the required 3.4 GHz clock signal to the PRBS Generator. The PRBS generator which is differential in nature, uses a current-mode XOR gate and sense-amplier based ip-ops with reduced delay and improved driving capability for better performance.The PLL features a differential delay based ring oscillator with reduced supply-sensitivity. The designed HDMI source is capable to transmit data at the rate of 3.4 Gb/s per channel and meets all the specifications defined by HDMI Specification Version 1.4. The power consumed by this HDMI source is 27.7 mW at 3.3 V, which is 30% lower than the power consumed by a conventional HDMI source. Full thesis: pdf Centre for VLSI and Embeded Systems Technology |
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