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A Novel Self-adaptive PVT Invariant CMOS Clock Generator with Process Sensing Digital Calibration unit for Real-Time Clock Applications An SoC friendly on-chip 32.7KHz clock generator is proposed to target low power IoT devicesAuthor: Kelam Mounika Date: 2021-04-15 Report no: IIIT/TH/2021/38 Advisor:Zia Abbas AbstractThe development of ultra-low power LSIs is a promising area of research in microelectronics. Such LSIs would be suitable for use in power-aware LSI applications such as portable mobile devices, implantable medical devices, and smart sensor networks. From compact sensors to advanced multi-core smartphones, various IoT devices hold precision and power efficiency as critical factors. Efficient management of switch on-off time acts as a key to minimize the power consumption. Therefore, maintaining accurate time is crucial for such type of devices. This is embraced by an on-chip RTC to retain reliable information of event occurrences. In addition, RTC’s interrupt management to alert the micro-controller host evaluates the robustness of the device. An RTC maintains a precise track of time by counting the oscillator cycles. Ultimately, the oscillation frequency (32.768KHz) is bounded by a speculation of time resolution and low power. Although the stable and precise nature of crystal oscillators (XOs) serve the purpose, they have few downsides. For being bulky, expensive and having high power consumption, the replacement of XOs is highly recommended. Focused research has been carried out for years on CMOS based oscillator architectures with sophisticated compensation techniques for reducing PVT variations. However, boosting the stability at low frequencies with low complexity, area and power have been a major challenge for next-generation IoT applications. This work presents a novel PVT-invariant CMOS relaxation oscillator for Real-Time Clock (RTC) applications. The proposed design works in a core voltage domain of SoC. The introduced self-adaptive compensation loop dynamically modifies the time constant of the oscillator core on sensing the process variation. Moreover, the design is accompanied by a digital calibration unit for further process compensation. The replacement of the resistor with a voltage-biased MOSFET has greatly enhanced the area efficiency. The required voltage and current bias in the circuit are generated through a novel current mixing technique which plays a crucial role in enhancing the performance of the system. Besides, the introduced supply independent bias circuit has greatly improved the supply regulation of the oscillator frequency Full thesis: pdf Centre for VLSI and Embeded Systems Technology |
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